DM54L73 Datasheet | National Semiconductor

DM54L73 Dual Master-Slave J-K Flip-Flops with Clear and plementary Outputs August 1989 DM54L73 Dual Master-Slave J-K Flip-Flops with Clear and plementary Outputs General Description This device contains two independent positive pulse triggered J-K flip-flops with plementary outputs The J and K data is processed by the flip-flops after a plete clock pulse While the clock is low the slave is isolated from the master On the positive transition of the clock the data from the J and K inputs is transferred to the master While the clock is high the data from the J and K inputs are disabled On the negative transition of the clock the data from the master is transferred to the slave...